diff options
| author | Leon Romanovsky <leonro@nvidia.com> | 2026-03-16 21:06:48 +0200 |
|---|---|---|
| committer | Marek Szyprowski <m.szyprowski@samsung.com> | 2026-03-20 12:05:36 +0100 |
| commit | e6a58fa2556203a7f6731b4071705dc81cca5ca5 (patch) | |
| tree | 404642b67acba4db7d6162c52cc55d4ac8f8f2ab /include | |
| parent | 9bb0a4d6a4433b75274204b083dac8e515d2007d (diff) | |
dma-mapping: Introduce DMA require coherency attribute
The mapping buffers which carry this attribute require DMA coherent system.
This means that they can't take SWIOTLB path, can perform CPU cache overlap
and doesn't perform cache flushing.
Signed-off-by: Leon Romanovsky <leonro@nvidia.com>
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Link: https://lore.kernel.org/r/20260316-dma-debug-overlap-v3-4-1dde90a7f08b@nvidia.com
Diffstat (limited to 'include')
| -rw-r--r-- | include/linux/dma-mapping.h | 7 | ||||
| -rw-r--r-- | include/trace/events/dma.h | 3 |
2 files changed, 9 insertions, 1 deletions
diff --git a/include/linux/dma-mapping.h b/include/linux/dma-mapping.h index da44394b3a1a..482b919f040f 100644 --- a/include/linux/dma-mapping.h +++ b/include/linux/dma-mapping.h @@ -87,6 +87,13 @@ #define DMA_ATTR_DEBUGGING_IGNORE_CACHELINES (1UL << 11) /* + * DMA_ATTR_REQUIRE_COHERENT: Indicates that DMA coherency is required. + * All mappings that carry this attribute can't work with SWIOTLB and cache + * flushing. + */ +#define DMA_ATTR_REQUIRE_COHERENT (1UL << 12) + +/* * A dma_addr_t can hold any valid DMA or bus address for the platform. It can * be given to a device to use as a DMA source or target. It is specific to a * given device and there may be a translation between the CPU physical address diff --git a/include/trace/events/dma.h b/include/trace/events/dma.h index 8c64bc0721fe..63597b004424 100644 --- a/include/trace/events/dma.h +++ b/include/trace/events/dma.h @@ -33,7 +33,8 @@ TRACE_DEFINE_ENUM(DMA_NONE); { DMA_ATTR_NO_WARN, "NO_WARN" }, \ { DMA_ATTR_PRIVILEGED, "PRIVILEGED" }, \ { DMA_ATTR_MMIO, "MMIO" }, \ - { DMA_ATTR_DEBUGGING_IGNORE_CACHELINES, "CACHELINES_OVERLAP" }) + { DMA_ATTR_DEBUGGING_IGNORE_CACHELINES, "CACHELINES_OVERLAP" }, \ + { DMA_ATTR_REQUIRE_COHERENT, "REQUIRE_COHERENT" }) DECLARE_EVENT_CLASS(dma_map, TP_PROTO(struct device *dev, phys_addr_t phys_addr, dma_addr_t dma_addr, |